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Designing a Low Voltage, High Current Tunneling Transistor

Authors:
Agarwal, Sapan
Yablonovitch, Eli
Technical Report Identifier: EECS-2013-250
2013-12-31
EECS-2013-250.pdf

Abstract: We analyze what is needed to design a low voltage high current tunneling field effect transistor (TFET). We consider the potential performance of changing the thickness of the tunneling barrier as well band edge energy filtering to achieve a steep turn on. We also consider the impact of dimensionality or shape on the turn on characteristics. Finally, we consider the gate efficiency of different TFET geometries.